Hardware emulation of 6509 using 6502?

classic Classic list List threaded Threaded
319 messages Options
1234 ... 16
Reply | Threaded
Open this post in threaded view
|

Hardware emulation of 6509 using 6502?

MiaM
Hi!
Just a crazy idea:
Since I assume 6509's are rather hard to get a hold of, and since the
6509 (and to some extent 6525 and maybe 6551) is the only "hard to get
a hold of" IC in a CBM-II computer, it might be a nice idea to make
some kind of logic to make a replica.

Maybe this is a bit too hard to actually do, but my idea is to keep
track of what the CPU does and detect the LDA and STA Y-indirect
instructions and then temporarily switch in the relevant bank during
the correct cycle. Maybe this won't be cycle exact (as I understand
from the data sheet of 6509, the cpu actually does a read from adress 1
or 0 when it needs to switch the output on the bank select pins, and
those cycles won't be needed with external hardware).

What do you think, would this be feasable?

Would it even be a good idea to make a replica of a CBM-II computer?


--
(\_/) Copy the bunny to your mails to help
(O.o) him achieve world domination.
(> <) Come join the dark side.
/_|_\ We have cookies.

       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Steve Gray
There was discussion on 6502.ORG about replacing the 6509 with a 6502.



 The consensus was that it's doable. I think it would be a great idea. The other alternative is just making an FPGA version. Since an FPGA 6502 is already available it would be fairly trivial to adapt it to do 6509.

 
A CBM-II replica/clone/with enhancements is on my todo list, but at my pace I wouldn't hold your breath ;-)

Steve



From: Mia Magnusson <[hidden email]>
To: [hidden email]
Sent: Saturday, November 4, 2017 10:22 AM
Subject: Hardware emulation of 6509 using 6502?

Hi!
Just a crazy idea:
Since I assume 6509's are rather hard to get a hold of, and since the
6509 (and to some extent 6525 and maybe 6551) is the only "hard to get
a hold of" IC in a CBM-II computer, it might be a nice idea to make
some kind of logic to make a replica.

Maybe this is a bit too hard to actually do, but my idea is to keep
track of what the CPU does and detect the LDA and STA Y-indirect
instructions and then temporarily switch in the relevant bank during
the correct cycle. Maybe this won't be cycle exact (as I understand
from the data sheet of 6509, the cpu actually does a read from adress 1
or 0 when it needs to switch the output on the bank select pins, and
those cycles won't be needed with external hardware).

What do you think, would this be feasable?

Would it even be a good idea to make a replica of a CBM-II computer?


--
(\_/) Copy the bunny to your mails to help
(O.o) him achieve world domination.
(> <) Come join the dark side.
/_|_\ We have cookies.

      Message was sent through the cbm-hackers mailing list


Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

David Holz-2
In reply to this post by MiaM
On 11/04/2017 07:22 AM, Mia Magnusson wrote:
> Hi!
> Just a crazy idea:
> Since I assume 6509's are rather hard to get a hold of, and since the
> 6509 (and to some extent 6525 and maybe 6551) is the only "hard to get
> a hold of" IC in a CBM-II computer, it might be a nice idea to make
> some kind of logic to make a replica.

If you have plenty of memory available, an I idea for a software
emulator that I had a while ago was to fill the "real" memory with BRKs,
and keep the 6509 code in another bank.  When a BRK is hit, the handler
looks at the 6509 bank to see if it's a 6502-compatible instruction or
not.  If so, it copies the instruction into the executing memory and
returns there.  If not, it runs a software emulation of the 6509
instruction.  In this way, the memory that's executed will fill with
6502 instructions which will run natively, BRKing into 6509 emulation
only when necessary.

There's a few gotchas, but all could theoretically be mitigated.  The
system needs to remember which parts of memory have had native code
written to it, which are BRK'd 6509 instructions that have executed, and
which have been data reads/writes.  Indirect addressing instructions
should always be emulated, so that it can selfmod whichever view of
those computed bytes are active.  Writes to code locations should
invalidate the executing destination back to BRKs, to be reevaluated
when next executed, and so on.  It would take quite a bit of RAM, but it
would be an interesting software-only approach that might end up being
quite quick.

Obviously a hardware approach would run closer to full speed and not
take up all that mirrored memory. :)

       Message was sent through the cbm-hackers mailing list
smf
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

smf
In reply to this post by MiaM
On 04/11/2017 14:22, Mia Magnusson wrote:
Maybe this won't be cycle exact (as I understand
from the data sheet of 6509, the cpu actually does a read from adress 1
or 0 when it needs to switch the output on the bank select pins, and
those cycles won't be needed with external hardware).

I don't believe there are additional cycles. You write to address 0 & 1, but then the contents are fed out on the P0-P3 pin based on the cycle that it's executing. I certainly can't find anything in the description or the block diagram that would suggest there is a delay. I find the cbm2 machines an oddity, I played with writing some software in vice but the lack of hardware is a motivational problem (plus writing software for it is abhorent).


Memory Management Control (P0-P3)

The four extended address pins, P0-P3, enable the processor to align to one of sixteen banks of 64K memory space.

The use of the instructions: Load A indirect Y (B 116) and Store A indirect Y (9116), transfers the processor from the normal execute mode to the indirect mode.

In the execute mode, the processor is aligned to a particular memory bank.

The indirect mode aligns the processor to a predeterm ined memory block.

The contents of the extended address registers is controlled by software with the execute register at location 0000 and indirect register at 0001.

During fetch and execution of the indirect mode instructions, the processor remains in execute mode until data transfer is to occur.

At this time the processor switches to the indirect mode aligning itself to the new memory block.

After one cycle the processor returns to the execute mode.

The upper four bits of the data bus are logic “ 0” s during a read/w rite to the extended address registers.

Also, these registers are set to logic “ 1 "s during reset. The extended address pins are not under control of AEC and are not tri-statable.

smf
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

smf
In reply to this post by David Holz-2
On 04/11/2017 16:47, David Holz wrote:
There's a few gotchas, but all could theoretically be mitigated.

Self modifying code will break that, some 6502 software I've been looking at recently used operands for variable storage.

Stuff like:

INC b+1

.b:

LDA #$00
STA $d020

Not only do you need enough memory but it needs to be bankable in the right way or you'll end up with memory map conflicts. For the amount of effort, it's probably easier to just monitor the SYNC line and look at the opcode and if it's indirect then switch to the correct bank.


Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

David Holz-2
On 11/04/2017 09:59 AM, smf wrote:
> Self modifying code will break that, some 6502 software I've been
> looking at recently used operands for variable storage.

No, that's already handled.  The system knows what code has been
executed, and what hasn't.  If bytes written are known as previously
executed code, then it reverts back to BRKs to be reevaluated on next
execution.  If those bytes weren't yet executed as code, then they'll be
BRK trapped anyway and evaluated as code for the first time then.

       Message was sent through the cbm-hackers mailing list
smf
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

smf

On 04/11/2017 17:14, David Holz wrote:

No, that's already handled.  The system knows what code has been
executed, and what hasn't.  If bytes written are known as previously
executed code, then it reverts back to BRKs to be reevaluated on next
execution.  If those bytes weren't yet executed as code, then they'll be
BRK trapped anyway and evaluated as code for the first time then.

How do you know when writing to an operand, where to write BRK to? The only way I can think of would be to set aside another copy of memory with offsets to the start of the instruction, as you won't want to write BRK to the operand address or it will just execute LDA #$00.


Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Michał Pleban
In reply to this post by MiaM
Hello!

Mia Magnusson wrote:

> Maybe this is a bit too hard to actually do, but my idea is to keep
> track of what the CPU does and detect the LDA and STA Y-indirect
> instructions and then temporarily switch in the relevant bank during
> the correct cycle.

I don't think that it should be difficult. The 6502 emits SYNC signal
when it is fetching a new opcode. It can then be checked if it's LDA/STA
(xx),Y opcode and appropriate memory bank can be switched. Nothing a
CPLD could not solve.

Regards,
Michau.

       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

David Holz-2
In reply to this post by smf
On 11/04/2017 10:37 AM, smf wrote:
> How do you know when writing to an operand, where to write BRK to? The
> only way I can think of would be to set aside another copy of memory
> with offsets to the start of the instruction, as you won't want to
> write BRK to the operand address or it will just execute LDA #$00.
>

Correct.  It's quite memory hungry, but was an interesting software
thought experiment. :-)

       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

And Fachat
In reply to this post by smf

Am 4. November 2017 17:52:05 schrieb smf <[hidden email]>:

> On 04/11/2017 14:22, Mia Magnusson wrote:
>
>
> Memory Management Control (P0-P3)
>
> The four extended address pins, P0-P3, enable the processor to align to
> one of sixteen banks of 64K memory space.
>
> The use of the instructions: Load A indirect Y (B 116) and Store A
> indirect Y (9116), transfers the processor from the normal execute mode
> to the indirect mode.
>
> In the execute mode, the processor is aligned to a particular memory bank.
>
> The indirect mode aligns the processor to a predeterm ined memory block.
>
> The contents of the extended address registers is controlled by software
> with the execute register at location 0000 and indirect register at 0001.
>
> During fetch and execution of the indirect mode instructions, the
> processor remains in execute mode until data transfer is to occur.
>
> At this time the processor switches to the indirect mode aligning itself
> to the new memory block.
>
> After one cycle the processor returns to the execute mode.
>
> The upper four bits of the data bus are logic “ 0” s during a read/w
> rite to the extended address registers.
>
> Also, these registers are set to logic “ 1 "s during reset. The extended
> address pins are not under control of AEC and are not tri-statable.
>


The easiest way to do this is probably hook up two register and a small gal to the databus mainly and the sync, r/-w phi2 and prob some more signals. Also a 15bit compare on the address bus.

The gal would monitor the executed opcodes using the sync signal and on the right opcode and the right cycle would switch the register values.

Probably needs more thoughts though

André

Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Michał Pleban
A. Fachat wrote:

> The easiest way to do this is probably hook up two register and a small
> gal to the databus mainly and the sync, r/-w phi2 and prob some more
> signals. Also a 15bit compare on the address bus.
>
> The gal would monitor the executed opcodes using the sync signal and on
> the right opcode and the right cycle would switch the register values.

My thoughts exactly. For the 15 bit compare, I would probably prefer to
use something like 74LS25, no need to waste PLD pins on something this
trivial.

Regards,
Michau.


       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Jim Brain
In reply to this post by Michał Pleban
On 11/4/2017 1:13 PM, Michał Pleban wrote:
Hello!

Mia Magnusson wrote:

Maybe this is a bit too hard to actually do, but my idea is to keep
track of what the CPU does and detect the LDA and STA Y-indirect
instructions and then temporarily switch in the relevant bank during
the correct cycle. 
I don't think that it should be difficult. The 6502 emits SYNC signal
when it is fetching a new opcode. It can then be checked if it's LDA/STA
(xx),Y opcode and appropriate memory bank can be switched. Nothing a
CPLD could not solve.

Regards,
Michau.

       Message was sent through the cbm-hackers mailing list

http://www.go4retro.com/downloads/Fake6509/

Given that the 6509 has the AEC behavior of the 6510, I believe you'll need a 65C02, which is what I used.  Someone still has to write the HDL, but I think the 6502.org discussion Steve linked should give folks what they need.

Jim



-- 
Jim Brain
[hidden email] 
www.jbrain.com
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Gerrit Heitsch
In reply to this post by Michał Pleban
On 11/04/2017 08:45 PM, Michał Pleban wrote:

> A. Fachat wrote:
>
>> The easiest way to do this is probably hook up two register and a small
>> gal to the databus mainly and the sync, r/-w phi2 and prob some more
>> signals. Also a 15bit compare on the address bus.
>>
>> The gal would monitor the executed opcodes using the sync signal and on
>> the right opcode and the right cycle would switch the register values.
>
> My thoughts exactly. For the 15 bit compare, I would probably prefer to
> use something like 74LS25, no need to waste PLD pins on something this
> trivial.

15 Bit compare? Meaning checking if all adress bits except A0 are zero?
Shouldn't that be possible with just 15 diodes that have their cathodes
connected together and their anodes connected to the adress lines? Might
need a resistor as a pulldown.

  Gerrit




       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Michał Pleban
In reply to this post by Jim Brain
Jim Brain wrote:

> http://www.go4retro.com/downloads/Fake6509/
>
> Given that the 6509 has the AEC behavior of the 6510, I believe you'll
> need a 65C02, which is what I used.  Someone still has to write the HDL,
> but I think the 6502.org discussion Steve linked should give folks what
> they need.

The AEC line is not used in the CBM-II so I think the AEC behavior
should not be important.

Unfortunately I am not familiar with Xilinx CPLDs so I cannot write the
HDL code quickly.

Regards,
Michau.


       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Jim Brain
On 11/4/2017 3:08 PM, Michał Pleban wrote:

> Jim Brain wrote:
>
>> http://www.go4retro.com/downloads/Fake6509/
>>
>> Given that the 6509 has the AEC behavior of the 6510, I believe you'll
>> need a 65C02, which is what I used.  Someone still has to write the HDL,
>> but I think the 6502.org discussion Steve linked should give folks what
>> they need.
> The AEC line is not used in the CBM-II so I think the AEC behavior
> should not be important.
Then, the NMOS 6502 should work in the same PCB.
>
> Unfortunately I am not familiar with Xilinx CPLDs so I cannot write the
> HDL code quickly.
If someone is serious about testing this, I am happy to write some HDL
to match the circuit in the linked 6502.org posting.   It's pretty simple.

Let me know.

Jim


       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Michał Pleban
Jim Brain wrote:

> If someone is serious about testing this, I am happy to write some HDL
> to match the circuit in the linked 6502.org posting.   It's pretty simple.

Sure, I can pop this into my 710 to test it.

Regards,
Michau.


       Message was sent through the cbm-hackers mailing list
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Jim Brain
On 11/4/2017 3:59 PM, Michał Pleban wrote:
Jim Brain wrote:

If someone is serious about testing this, I am happy to write some HDL
to match the circuit in the linked 6502.org posting.   It's pretty simple.
Sure, I can pop this into my 710 to test it.

Regards,
Michau.


       Message was sent through the cbm-hackers mailing list

I'll order a PCB.


Jim


-- 
Jim Brain
[hidden email] 
www.jbrain.com
smf
Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

smf
In reply to this post by David Holz-2
On 04/11/2017 18:13, David Holz wrote:
Correct.  It's quite memory hungry, but was an interesting software
thought experiment. :-)

Have you considered what would happen if software used operands as opcodes? It's pretty perverse, clocksliding on the c64 comes to mind

Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

Steve Gray
In reply to this post by Jim Brain
I can test as well !

Steve



From: Jim Brain <[hidden email]>
To: [hidden email]
Sent: Saturday, November 4, 2017 6:14 PM
Subject: Re: Hardware emulation of 6509 using 6502?

On 11/4/2017 3:59 PM, Michał Pleban wrote:
Jim Brain wrote:

If someone is serious about testing this, I am happy to write some HDL
to match the circuit in the linked 6502.org posting.   It's pretty simple.
Sure, I can pop this into my 710 to test it.

Regards,
Michau.


       Message was sent through the cbm-hackers mailing list
I'll order a PCB.

Jim

-- Jim Brain
[hidden email] www.jbrain.com


Reply | Threaded
Open this post in threaded view
|

Re: Hardware emulation of 6509 using 6502?

And Fachat

So can I :-)

André

Am 6. November 2017 6:12:52 PM schrieb Steve Gray <[hidden email]>:

I can test as well !

Steve



From: Jim Brain <[hidden email]>
To: [hidden email]
Sent: Saturday, November 4, 2017 6:14 PM
Subject: Re: Hardware emulation of 6509 using 6502?

On 11/4/2017 3:59 PM, Michał Pleban wrote:
Jim Brain wrote:

If someone is
serious about testing this, I am happy to write some HDL
to match the circuit in the linked 6502.org posting.   It's pretty simple.
Sure, I can pop this
into my 710 to test it.

Regards,
Michau.


       Message was sent through the cbm-hackers mailing list
I'll order a PCB.

Jim

-- Jim Brain
[hidden email] www.jbrain.com


1234 ... 16